Apple Jobs in California

Cellular SoC Static Timing Analysis EngineerSan Diego, California, United States

As an ASIC STA engineer, you will be responsible for all aspects of timing including, working with designers for timing constraints generation, helping construct/modify flows, timing analysis and timing closure.

ResponsibilitiesPerforming static timing analysis across multiple corners and modes using tools like Synopsys PrimeTime.

Maintaining and validating SDC constraints, collaborating closely with RTL, synthesis, and physical design teams to resolve timing issues.

Own STA sign-off for block and chip level including custom timing checks. Develop automation scripts in Tcl or Python to streamline analysis and reporting, prepare sign-off quality constraints, and ensure the design meets all performance and reliability targets before tape-out.

Minimum QualificationsBS and 10

• years of relevant industry experience.

Hands-on experience in ASIC timing constraints generation and timing closure.

Expertise in STA tools (such as Primetime) and methodologies for timing closure with a good understanding of OCV, noise and crosstalk effects on timing.

Deep understanding and experience in timing closure of various test modes such as scan shift, scan capture, atspeed and BIST testing.

Strong background in Constraint analysis and debug, using industry standard tools such as Synopsys CA (Constraint Analyzer).

Knowledge of timing corners/modes, process variations and signal integrity related issues.

Hands on experience in timing/SDC constraints generation and management.

Proficient in scripting languages (Tcl and Perl/Python).

Strong communication skills are a pre-requisite as the candidate will collaborate with a lot of diverse groups (e.g. digital design, DFT, physical design, etc.).

Preferred QualificationsMS and 8

• years of relevant industry experience.
• Understand and implement improving existing methodologies and flows. Experience in reducing the number of timing signoff corners by merging different timing modes is highly desired.

Solid understanding of low-power techniques including clock gating, power gating and multi-voltage designs.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.