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Job posting data last updated March 10, 2026.
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AMS SerDes Robustness Analysis Validation Architect
Apple
AMS SerDes Robustness Analysis Validation Architect
Are you inherently curious, hands-on, and analytical? We are seeking a seasoned SerDes Robustness Analysis & Validation Architect with a strong technical foundation and a hands-on approach to drive the robustness, performance, and margin validation of high-speed SerDes PHYs, such as PCIe and USB, within our system. This role is ideal for someone who is motivated to push designs to the edge through intentional stress testing and margin-finding techniques!
You will architect validation strategies that go beyond traditional spec-checking, focusing on uncovering weaknesses in design assumptions, stress-to-fail conditions, and system interactions across wide-ranging PVT and real-world scenarios, including edge case behaviors. A deep understanding of SerDes design and validation principles, SOC/system integration, and real-world system environments is required. The role demands strong collaboration with design, architecture, and system teams to ensure the IP is designed with design for testability. In addition, you will also partner closely with the validation team to help optimize for maximum test coverage vs. execution time, ensuring efficient yet thorough validation. This is a hands-on lab role that requires close collaboration with designers, architects, system, and test engineers to validate next-generation SerDes IPs from design conception through production.
Responsibilities include
Defining and architecting margin-to-fail validation strategies to uncover weaknesses and failure conditions in high-speed SerDes PHYs across multiple process, voltage, temperature, and different system environments.
- Developing and implementing stress-to-fail methodologies, covering end-to-end systems, such as stressing equalization paths, clocking structures, jitter sensitivities, and link training edge cases.
Collaborating early with SerDes design, architecture, and system teams to review specifications, define coverage priorities, and to build in needed design-for-test (DFT) insertion or sensors to improve observability, measurements, pattern generators, observability hooks, etc.
Analyzing silicon behaviors across multiple builds and revisions; deriving insights to guide validation refinement and inform design updates.
Providing post-silicon feedback that improves future architectural decisions, design margins, and validation methodology.
Guiding junior validation engineers, sharing debug techniques, and contributing to internal standard processes for SerDes validation.
Minimum qualifications include
A BS and 20
Preferred qualifications include
A PhD in Electrical Engineering or related field with 20
Hands-on lab experience with lab instrumentations such as oscilloscopes, BERTs, protocol analyzers, etc., and measurement setups tailored for SerDes PHYs.
Deep understanding of high-speed serial link protocols (PCIe, USB, Ethernet, DisplayPort, etc.) and equalization techniques (such as CTLE, DFE, FFE, etc.).
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Familiarity with production and characterization flows, including margin-to-fail and stress testing techniques.
Passion for deep debug and a 'find the flaw' mentality, with an interest to explore the unexpected.
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $257,400 and $386,300, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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