SoC Design/Integration & Synthesis Engineer
Apple
Austin, Texas
Posted 2 weeks ago
Qualifications
Education
BS degree
Responsibilities
Primary Duties
- Drive all front-end integration activities like Integration, Synthesis, UPF, Logical Equivalence, ECO, etc.
- Work closely on methodology improvements for improving synthesis QOR.
- Work on Low power design, writing UPFs, close on power intent verification at the chip level.
- Work on RTL integration, timing constraints, and synthesis of designs.
- Work closely with other engineers that are members of the SOC Design, SOC Design Verification, Emulation, STA, Power, and Physical Design teams.
Experience Requirements
Required
20 years of industry experience
20 years of experience
Required Skills
Technical Skills
digital design integrationsynthesisUPFtiming analysisclosurelow-power synthesis methodologiesfront-end toolsscripting languagesRTL logic designmulti-million gate ASICs
Soft Skills
communicationattention to detaildesire to learn
Full Job Description
SoC Design/Integration & Synthesis Engineer
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will be part of a group that defines flows and methodologies in all these fields that help Apple implement complex chips with the best QOR (quality of results) and PPA (power, performance, and area) using cutting-edge technologies. We are searching for a talented engineer to join our exciting team of problem solvers.
Description
As an SOC/ASIC Integration & Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design:
Minimum Qualifications
BS degree + 20 years of industry experience is required.
Preferred Qualifications
Expertise in digital design integration, synthesis, UPF, timing analysis, and closure.
Worked closely on improving low-power synthesis methodologies.
Hands-on experience in all aspects of the chip development process with proficiency in front-end tools and methodologies.
Experience with scripting languages like Perl or Tcl or Python.
RTL logic design or implementation experience on multi-million gate ASICs will be a plus.
Ability to communicate effectively across all internal groups.
Attention to detail and desire to learn.
Familiarity with modern AI tools and platforms, with the ability to adapt and learn new AI technologies as they emerge.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics.
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will be part of a group that defines flows and methodologies in all these fields that help Apple implement complex chips with the best QOR (quality of results) and PPA (power, performance, and area) using cutting-edge technologies. We are searching for a talented engineer to join our exciting team of problem solvers.
Description
As an SOC/ASIC Integration & Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design:
- Drive all front-end integration activities like Integration, Synthesis, UPF, Logical Equivalence, ECO, etc.
- Work closely on methodology improvements for improving synthesis QOR.
- Work on Low power design, writing UPFs, close on power intent verification at the chip level.
- Work on RTL integration, timing constraints, and synthesis of designs.
- Knowledge of FE flows like Lint & LEQ and scripting is a plus.
- Work closely with other engineers that are members of the SOC Design, SOC Design Verification, Emulation, STA, Power, and Physical Design teams.
Minimum Qualifications
BS degree + 20 years of industry experience is required.
Preferred Qualifications
Expertise in digital design integration, synthesis, UPF, timing analysis, and closure.
Worked closely on improving low-power synthesis methodologies.
Hands-on experience in all aspects of the chip development process with proficiency in front-end tools and methodologies.
Experience with scripting languages like Perl or Tcl or Python.
RTL logic design or implementation experience on multi-million gate ASICs will be a plus.
Ability to communicate effectively across all internal groups.
Attention to detail and desire to learn.
Familiarity with modern AI tools and platforms, with the ability to adapt and learn new AI technologies as they emerge.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics.
How to Apply
$71
/ hour
Apple pays $71 for Hardware Engineer in Austin, Texas, with most salaries ranging from $41 to $131. Pay can vary based on role, experience, and local cost of living.
Median
$71
Low
$41
High
$131
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