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Apple hiring CPU Microarchitect/RTL Engineer - Execution, Load/Store, Santa Clara, California

CPU Microarchitect/RTL Engineer - Execution, Load/Store

Apple

Santa Clara, California
Posted yesterday

CPU Microarchitect/RTL Engineer

• Execution, Load/StoreImagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac.

We are looking for an experienced engineer to drive architecture and RTL development of CPU integer, floating-point, and/or load/store execution for our performant cores.

DescriptionAs a CPU Microarchitect/RTL Engineer, you will own or participate in the following:

Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification

RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals

Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification

Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance

Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power

Minimum Qualifications Minimum BS and 3

• years of relevant industry experience

Experience with microprocessor architecture

  • Experience with logic design principles with timing and power implications

Experience in Verilog or VHDL

Experience with simulators and waveform debugging process

Preferred Qualifications Expertise in one or more of the following areas

out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems

  • Understanding of low power microarchitecture techniques
  • Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
  • Experience in C or C

  • programming
  • Experience using an interpretive language such as Perl or Python
  • Pay & BenefitsAt Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

    Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

    Estimated Salary

    $100
    / hour

    Apple pays $100 for Network Architect in Santa Clara, California, with most salaries ranging from $65 to $160. Pay can vary based on role, experience, and local cost of living.

    Median
    $100
    Low
    $65
    High
    $160

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    Figures represent approximate ranges and may vary based on experience, location, and other factors. For the most accurate information, please consult the employer directly. Contact us to suggest updates to this information.