SoC Power Flow Methodology Engineer
Apple
Beaverton, Oregon
Posted 1 months ago
Qualifications
Education
A minimum of a bachelor's degree in relevant field
Responsibilities
Primary Duties
- Deliver new automated solutions and capabilities for the Silicon Engineering Power team
- Help with the architecture, implementation, and verification of new low-power design and verification flows
- Craft the low-power methodologies across a wide variety of future technologies
- Create flows and tools related to power analysis, optimization and verification
- Communicate with the design team to answer questions about the materials and drive issues to resolution
Experience Requirements
Required
3 years of relevant industry experience
3 years of experience
Required Skills
Technical Skills
VLSI designsSOC design flowsscriptinglow-power domain-specific knowledgeflow developmentobject-oriented language algorithm designPythonC++JavaTclPerlEDA toolsGUI developmentlow-power conceptsUPF
Soft Skills
Good written/verbal communications skills
Full Job Description
SoC Power Flow Methodology Engineer
Beaverton, Oregon, United States
Hardware
Do you love creating solutions for complex challenges? As part of the Low Power group within Silicon Technologies, you'll help deliver cutting-edge new technology and capabilities for low-power chip design that fuels Apple's next-generation chips! In this role, as a member of our dynamic group, you will be responsible for the development and enhancement of our low-power flows, providing designers new capabilities in terms of power domains unseen in previous chips, while working on highly visible products used by millions of people every day!
Description
As a Power Flow Methodology Engineer, you'll deliver new automated solutions and capabilities for the Silicon Engineering Power team to build chips that are more power efficient than ever before. You will help with the architecture, implementation, and verification of new low-power design and verification flows and help to craft the low-power methodologies across a wide variety of future technologies. The work involves creating flows and tools related to power analysis, optimization and verification which may be run as part of RTL construction/verification, synthesis, or P&R. Additional responsibilities include communicating with the design team to answer questions about the materials and drive issues to resolution.
Minimum Qualifications
A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience.
Preferred Qualifications
Good understanding of VLSI designs and SOC design flows. Strong passion for scripting and applying low-power domain-specific knowledge to create new software solutions. Strong background with flow development and/or object-oriented language algorithm design such as Python / C++ / Java. Solid understanding and proven track record using modern software testing and development practices. Good written/verbal communications skills are required. Knowledge of Tcl / Perl, experience with EDA tools, GUI development, and/or low-power concepts such as UPF and low-power design is a plus.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
Apple accepts applications to this posting on an ongoing basis.
Beaverton, Oregon, United States
Hardware
Do you love creating solutions for complex challenges? As part of the Low Power group within Silicon Technologies, you'll help deliver cutting-edge new technology and capabilities for low-power chip design that fuels Apple's next-generation chips! In this role, as a member of our dynamic group, you will be responsible for the development and enhancement of our low-power flows, providing designers new capabilities in terms of power domains unseen in previous chips, while working on highly visible products used by millions of people every day!
Description
As a Power Flow Methodology Engineer, you'll deliver new automated solutions and capabilities for the Silicon Engineering Power team to build chips that are more power efficient than ever before. You will help with the architecture, implementation, and verification of new low-power design and verification flows and help to craft the low-power methodologies across a wide variety of future technologies. The work involves creating flows and tools related to power analysis, optimization and verification which may be run as part of RTL construction/verification, synthesis, or P&R. Additional responsibilities include communicating with the design team to answer questions about the materials and drive issues to resolution.
Minimum Qualifications
A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience.
Preferred Qualifications
Good understanding of VLSI designs and SOC design flows. Strong passion for scripting and applying low-power domain-specific knowledge to create new software solutions. Strong background with flow development and/or object-oriented language algorithm design such as Python / C++ / Java. Solid understanding and proven track record using modern software testing and development practices. Good written/verbal communications skills are required. Knowledge of Tcl / Perl, experience with EDA tools, GUI development, and/or low-power concepts such as UPF and low-power design is a plus.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
Apple accepts applications to this posting on an ongoing basis.
How to Apply
$69
/ hour
Apple pays $69 for Hardware Engineer in Beaverton, Oregon, with most salaries ranging from $40 to $126. Pay can vary based on role, experience, and local cost of living.
Median
$69
Low
$40
High
$126
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Figures represent approximate ranges and may vary based on experience, location, and other factors. For the most accurate information, please consult the employer directly. Contact us to suggest updates to this information.





