Apple Jobs in Texas

GPU Physical Design Clocking Engineer

Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on, technical work.

You will be implementing complete chip design from netlist to tapeout.

You will have hands-on experience in physical design and large chip integration.

Description

As a GPU Clocking engineer, you will collaborate with FE teams to understand chip architecture and drive clocking aspects early in the design cycle.

You will drive best in class clocking construction and solutions for performance, power and Area (PPA).

You will collaborate to drive clocking methodologies and "best known methods" to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress.

You will need to communicate and drive the needs of PD and Clocking with multi-functional teams that will enable achieving the goals of the back-end design for the project.

Minimum Qualifications

BS

• 10 years of relevant experience

Experience with ASIC integration including one or more of the following

Floorplanning, Clock and Power distribution, global signal planning, and I/O planning.

• Experience with Floorplanning tools, P&R flows, and global timing verification Flows is required.

Preferred Qualifications

Exposure to different strategies for clock distribution including balanced trees, mesh, and forwarded clocks.

Experience with Physical Design topics

multiple voltage and clock domains, ESD solutions, and mixed signal block integration.

Familiar with various process related design issues including Design for Yield and Manufacturability, multi Vt strategies and thermal Mgt.